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探针维修

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Automated Testing of Bare Die-to-Die Stacks

This paper presents an approach to perform automatic stepping and probing on arrays of D2D stacks pick-n-placed (PnP) on a carrier substrate. An algorithm will be described for the Cascade Microtech CM300 probe station to automatically correct small PnP misalignments. Experimental results will be presented on three types of carriers: (1) dicing tape on tape frames for Ø 100 mm wafers, (2) sheets of single-sided thermal-release tape, and (3) Ø 300 mm carrier wafers with double-sided thermal-release tape.

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3 Key Challenges for Consistent, Accurate RF Measurement Results

Engineers deal with architectures and multi-functional ICs that continuously decrease physical dimensions, while operation frequencies and levels of integration complexity increase. Learn how they achieve high levels of accuracy and confidence in measurement results.

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Tomorrow’s Chip Interconnects Call for New Reliability Test Method

Shrinking semiconductor geometries with reduced reliability margins demand a highly accurate method for modeling EM ef­fects to produce proper IC design rules. CVEM offers a precise solution to avoid these pitfalls and enable IC manufacturers to continue offering aggressive perfor­mance specifications without sacrificing quality.

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Consistent Parameter Extraction for Advanced RF Devices

Consistent Parameter Extraction for Advanced RF Devices

Pushing device operation frequencies towards the sub-THz range causes serious challenges for conventional device characterization techniques. This application note presents a comparison of SOLT, NIST multiline TRL, and LRRM probe-tip calibration methods for accuracy of measured and extracted figure of merits (FoM) of advanced BiCMOS HBT. A good understanding of possible sources of errors and potential room for improvement at each step are key to increasing the accuracy of device characterization. This paper will show why eLRRM is recommended as an accurate, consistent and easy to implement probe tip calibration method for characterization of advanced high-performance active devices.

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Direct Probing on Large-Array Fine-Pitch Micro-Bumps of a Wide-I/O Logic-Memory Interface

Experiments show the technical feasibility of the direct probing approach, with probe tips making proper electrical contact to the micro-bumps, causing only limited probe marks and no measureable impact on stack interconnect yield. Cost modeling indicates economic feasibility for single-site testing, with the next step to prepare the technology for volume production.

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New Calibration Solutions for Multi-Channel Probes using an Added Port for Thru Measurements

A new method is proposed for calibrating multichannel probes placed in multiple quadrants for wafer or chip level measurement. It uses an additional ground-signal-ground probe to enable thru measurements in a conventional calibration procedure, avoiding the need for custom calibration kits. The inherent delay inconsistencies in the proposed method are shown to be small enough to have minimal effects on the measurement uncertainties, in most practical cases.

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Please see this important announcement regarding Microsoft Windows XP.

FormFactor Enters Definitive Agreement to Acquire Cascade Microtech

Leveraging combined global support and channel investments across a product line that spans from engineering to production test applications, the combined company will be uniquely positioned to solve customers’ most difficult test challenges from engineering to production.

Press Release | Investor Presentation


Cascade Microtech收购Aetrium可靠性测试产品业务

Reliability Test Products

本次收购强化了公司的产品整合以及晶圆工艺技术在晶圆级可靠性方面的解决方案。该收购与公司致力于提供综合测量解决方案用以满足先进半导体工艺中产生的新兴需求的战略紧密契合。

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